1. Field of the Invention
The present invention relates to a level converter circuit for use in a CMOS circuit device, and in particular, to a level converter circuit that converts a signal level of a digital signal from a first voltage level to a second voltage level higher than the first voltage level.
2. Description of the Related Art
As the most effective technique for reducing the power consumption of LSIs, a reduction in the power supply voltage can be enumerated. In particular, a technique for supplying an optimal power supply voltage to each of circuit blocks is adopted for the recent LSIs, and therefore, it is sometimes the case where power supply voltages which are optimum for the circuit blocks differ from one another. Accordingly, a level converter circuit is needed between such circuits of different signal levels. Up to now, a variety of level converter circuits have been reported. The existing circuits generally have level converter circuits based on a latch structure. However, these level converter circuits have such a problem that the driving power of transistors driven by a low power supply voltage becomes extremely small when the difference voltages between the power supply voltages of the circuits are relatively large, and a stable level conversion operation is not guaranteed.
Prior art documents related to the present invention are as follows: